PIC18 -> Device features

RESET

A reset puts the PIC in a well defined initial state, so that the processor starts executing code from the first instruction.

Reset can result from

- external reset by MCLR pulled low

- reset on power-up

- reset by Watch-Dog Timer Over Flow

- reset on power suplly Brown-out

CPU

The ALU is responsible for adding,subtracting,shifting and performing logical operations.

The ALU operates in conjuction with 

- a general purpose register called W register.

- an f register that can be any location in data memory.

- literals embedded in the instruction code.

Configuration Registers

• There are some features of the PIC18 that we can choose by programming the bits of the configuration registers.
• These features can be used to exclude the external hardware, because by using configuration bits, special features of the PIC controller can be used as external hardware (like internal), that makes the PIC different from other microcontrollers.

CONFIG1H  ==> OSCILLATOR SELECTION 
CONFIG2L  ==>  BROWN OUT
CONFIG2H  ==> WATCH DOG ENABLE
CONFIG4L  ==> BACKGROUND DEBUGGER AND ICSP  
CONFIG5L  ==> CODE PROTECTION
CONFIG5H  ==> EEP ROM AND BOOT BLOCK PROTECTION
CONFIG6L  ==> WRITE PROTECTION
CONFIG6H  ==> WRITE PROTECTION
CONFIG7L  ==>  READ PROTECTION
CONFIG7H  ==> BOOT BLOCK READ PROTECTION
DEVID1       ==> DEVICE ID AND REVISION
DEVID2       ==> DEVICE ID

The configuration bits can be programmed (read as ‘0’) or left un-programmed (read as ‘1’), to select various device configurations.First four configuratioin registers are very necessary to configure for start-up programs.

CONFIG1H: CONFIGURATION REGISTER 1HIGH

bit 7-6 Unimplemented: Read as ‘0’

bit 5 OSCSEN: Oscillator System Clock Switch Enable bit

1 = Oscillator system clock switch option is disabled (main oscillator is source)

0 = Oscillator system clock switch option is enabled (oscillator switching is enabled)

bit 4-3 Unimplemented: Read as ‘0’

bit 2-0 FOSC2:FOSC0: Oscillator Selection bits

1 1 1    =  RC oscillator w/OSC2 configured as RA6

1 1 0    =  HS oscillator with PLL enabled/clock frequency = (4 x FOSC)

1 0 1    =  EC oscillator w/OSC2 configured as RA6

1 0 0    =  EC oscillator w/OSC2 configured as divide-by-4 clock output

0 1 1    =  RC oscillator

0 1 0   =   HS oscillator

0 0 1   =   XT oscillator

            0 0 0   =   LP oscillator

Note:If you are using external crystal osc for clock, then  you have to use 
#pragma config OSC=RC

CONFIG2L: CONFIGURATION REGISTER 2 LOW

bit 7-4 Unimplemented: Read as ‘0’

bit 3-2 BORV1:BORV0: Brown-out Reset Voltage bits

           11 = VBOR set to 2.0V

           10 = VBOR set to 2.7V

           01 = VBOR set to 4.2V

           00 = VBOR set to 4.5V

bit 1 BOREN: Brown-out Reset Enable bit

          1 = Brown-out Reset enabled

          0 = Brown-out Reset disabled

bit 0 PWRTEN: Power-up Timer Enable bit

          1 = PWRT disabled

          0 = PWRT enabled
Power-Up Timer provides fixed delay during power up, which keeps the CPU in rest until the power supply is stablized.

In preferred IDE (MPLAB X), we use CONFIG directive to set the values

CONFIG BORV=45      // for Vdd =5V and OSC = 10MHz
CONFIG PWRT=ON    //  use power up timer
CONFIG BOR =ON      //  enable BORV options

CONFIG2H: CONFIGURATION REGISTER 2 HIGH

Watch dog  timer is used to force the micro controller into known state of reset, when the system is hung up or out of control due to execution of incorrect sequence of codes. 

bit 7-4 Unimplemented: Read as ‘0’

bit 3-1 WDTPS2:WDTPS0: Watchdog Timer Postscale Select bits

            1 1 1 = 1:128

            1 1 0 = 1:64

            1 0 1 = 1:32

            1 0 0 = 1:16

            0 1 1 = 1:8

            0 1 0 = 1:4

            0 0 1 = 1:2

            0 0 0 = 1:1

Note: The Watchdog Timer postscale select bits configuration used in the PIC18FXXX

devices has changed from the configuration used in the PIC18CXXX devices.

bit 0 

WDTEN: Watchdog Timer Enable bit

            1 = WDT enabled

            0 = WDT disabled (control is placed on the SWDTEN bit)

CONFIG4L: CONFIGURATION REGISTER 4 LOW

bit 7 DEBUG: Background Debugger Enable bit

         1 = Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.

         0 = Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.

bit 6-3 Unimplemented: Read as ‘0’

bit 2 LVP: Low-Voltage ICSP Enable bit

         1 = Low-Voltage ICSP enabled

         0 = Low-Voltage ICSP disabled

bit 1 Unimplemented: Read as ‘0’

bit 0 STVREN: Stack Full/Underflow Reset Enable bit

         1 = Stack Full/Underflow will cause Reset

         0 = Stack Full/Underflow will not cause Reset

DEVID1: DEVICE ID REGISTER 1 FOR PIC18FXX8 DEVICES

DEVID2: DEVICE ID REGISTER 2 FOR PIC18FXX8 DEVICES

Note: You can learn about Configuration Bits in brif from PIC18 Data Sheet To Download,Click Here

Setting the CONFIG registers in C compiler
#pragma config OCS=HS,OSCS=OFF
#pragma config BORV=45,PWRT=OFF,BOR=ON
#pragma config WDT=OFF
#pragma config DEBUG=OFF,LVP=OFF,STVR=OFF
void main()
{
.............
.............
.............
}